Modelling and Simulation of a SAR ADC with Internally Generated Conversion Signal
نویسنده
چکیده
This paper presents the modeling and simulation of a 833.33 kS/s, 51.279μW successive approximation register(SAR) Analog to Digital Converter(ADC) using 0.18μm CMOS technology that uses internally generated signal for approximation for low power applications. The ADC is powered by single supply voltage of 1V. In our scheme, comparator output time and bit settling time of the Digital to Analog Converter(DAC) are utilized to generate a signal level such that the next step of the conversion can take place. This model is significant for Globally Asynchronous Locally Synchronous(GALS) system integration.
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تاریخ انتشار 2015